1. Field of the Invention
The present invention relates to a semiconductor test apparatus.
2. Description of the Related Art
In recent years, high-speed serial interfaces have been used in order to realize transmission of large volumes of data between semiconductor devices. As such high-speed serial interfaces, those using signals such as High Definition Multimedia Interface (HDMI) and Low Voltage Differential Signaling (LVDS) capable of transmitting video data and audio data at high speeds, have been in practical use.
In order to test whether a device mounted with a high speed-serial interface normally functions, a test at actual operating frequency (also referred to as an At-Speed test) is performed. The test at actual operating frequency is realized by a method in which a transmitter and a receiver of a high-speed serial interface are connected together through a transmission line on a socket board (also referred to as a performance board). The test is also referred to as a loopback test in the case where the transmitter and the receiver are mounted in the same device, or a back-to-back test in the case where the transmitter and the receiver are mounted in different devices.
Recently, data rates of the high-speed serial interfaces have been sped up to several to ten Gbps or more, and therefore it becomes difficult to ensure an effective timing margin, i.e., eye opening, per bit on the receiver side due to influence of jitter induced by a transmission line loss, causing a problem that the Bit Error Rate (BER) is deteriorated. In order to solve the problem, the high-speed interface is implemented with a waveform equalizing circuit (so-called an equalizing circuit) for compensating the transmission line loss, on either the transmitter side or the receiver side, or on both sides, allowing the compensation for the transmission line loss of several to tens dB or more. In some cases, the compensation amount can be set by a programmable control or a dynamic control.
The equalizing circuit basically serves as a filter for emphasizing a high-frequency component, which is realized by the following method. Any method is the same within the meaning that filtering having an opposite characteristic for compensating a high frequency loss of the transmission line is performed: 1. a method in which a direct current (DC) gain is lowered to relatively raise an alternating current (AC) gain; 2. a method in which the equalizing circuit is structured with a passive device as a peaking circuit; and 3. a method in which a feedback add-control in a bit unit (unit interval unit) is performed by digital signal processing.
In the current loopback test or the back-to-back test, a method is employed in which the transmitter and the receiver are connected together on the socket board with a line, which is as short and of equal length as possible, without performing a test for the equalizing function, such that a Clock and Data Recovery (CDR) link or a source synchronous link is established by a predetermined procedure, and a pass judgment is made when there is not a transmission error for a certain time. Alternatively, a method is sometimes employed in which an eye margin is measured by searching for an effective eye opening by sweeping the clock timing on the receiver side.
When the test for the equalizing function of the high-speed interface circuit is not performed, there is a possibility that the equalizing function may not operate normally in practical use even if the circuit has passed the actual operating frequency test in the loopback test or the back-to-back test. In addition, in the case of the specification in which an equalizing intensity can be set in a programmable way, the equalizing performance corresponding to the setting cannot be obtained in practical use when the linearity of the equalizing intensity is not tested, which can possibly lead to deterioration of the BER.